In accordance with the demand for higher density semiconductor devices, a semiconductor device on which multiple semiconductor packages are mounted has been developed. In order to reduce the mount area of the semiconductor device, a PoP (Package on Package) technique in which multiple semiconductor packages are stacked is used.
Japanese Patent Application Publication No. 9-283702 (hereinafter described as Document 1) discloses an arrangement of holding leads with clips, the leads being drawn from the semiconductor packages. Japanese Patent Application Publication No. 11-87601 (hereinafter described as Document 2) discloses an arrangement of stacking semiconductor packages by bending leads around the outer shape of each semiconductor package, the leads being drawn from the semiconductor packages.
However, when a defective semiconductor package is discovered in a plurality of semiconductor packages that have already been stacked, it is not easy to remove and replace the defective semiconductor package with a replacement semiconductor package. This increases the cost of fabricating the semiconductor devices.